Samsung Electronics has publicly unveiled a mock-up of its next-generation High Bandwidth Memory (HBM5) for the first time, signaling an aggressive push to regain leadership in the rapidly expanding AI memory semiconductor market.
Speaking to reporters at Computex 2026 in Taipei on Tuesday, Song Jae-hyuk, Chief Technology Officer (CTO) of Samsung Electronics’ Device Solutions division, emphasized that future competitiveness in the AI era would depend on integrated semiconductor capabilities spanning memory, foundry, logic chips, and advanced packaging.
“To respond to the rapidly evolving AI industry, total solution competitiveness across memory, foundry, logic, and packaging technologies is becoming increasingly important,” Song said.
At the exhibition, Samsung introduced the physical mock-up of HBM5 alongside its newly developed HPB (Heat Path Block) technology, a key thermal management structure designed for next-generation AI memory products.
The HPB structure creates additional heat-transfer pathways between memory dies to reduce thermal resistance and improve heat dissipation efficiency. As AI accelerators become more powerful and memory stacks grow taller and denser, controlling heat generation has emerged as one of the industry’s biggest technological challenges.
Song compared the HPB structure to “a chimney-like heat pathway” that enables more efficient thermal control inside ultra-high-performance memory systems.
“The technology will play an important role in improving HBM performance and overall system efficiency in future high-bandwidth, high-density AI computing environments,” he said.
Samsung plans to adopt a base die manufactured with its own 2-nanometer foundry process for HBM5, integrating advanced memory and logic semiconductor technologies within a single product architecture. The strategy reflects Samsung’s effort to differentiate itself from rivals by leveraging both its memory dominance and contract chipmaking capabilities.
Industry sources say Samsung has already completed implementation and validation of HPB technology in HBM4E-based products and plans to fully commercialize the structure beginning with HBM5.
The company also displayed HBM4E wafers and chipsets that began sample shipments last month. HBM4E combines Samsung’s latest 1c DRAM core die with a 4nm foundry-based base die, representing one of the industry’s most advanced HBM architectures.
The unveiling comes amid intensifying competition between Samsung and SK hynix for dominance in the AI memory market. SK hynix currently holds a strong position in HBM supply for Nvidia’s AI accelerators, but Samsung is seeking to narrow the gap through more advanced process technologies and integrated manufacturing capabilities.
Market analysts believe Samsung’s decision to reveal HBM5 hardware earlier than expected reflects confidence in its roadmap and an effort to secure technological leadership ahead of the next AI memory cycle.
Samsung previously drew industry attention by supplying HBM4 products to Nvidia ahead of competitors. SK hynix is also believed to have recently passed qualification testing for HBM4 products and begun supplying them to Nvidia as well.
However, Samsung is viewed as having an edge in certain process technologies, particularly through its use of cutting-edge 1c DRAM and 4nm base die manufacturing processes, which are expected to provide advantages in speed, power efficiency, and integration.
With global AI infrastructure investment accelerating, the battle for leadership in next-generation HBM technology is expected to intensify further, with Samsung and SK hynix at the center of the competition.
